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SST39系列SST39LF200A芯片解密

芯谷芯片解密所长期专业承接SST39LF200A芯片解密等SST系列较高难度芯片解密、单片机解密项目合作。我们多年来一直专注于各类IC解密、MCU单片机解密、DSP芯片解密、CPLD芯片解密等技术研究领域，尤其在简单单片机低成本解密方案研究和疑难IC芯片解密技术攻关中倾注了更多的精力，目前，我们不仅在简单单片机解密领域的技术手法相当成熟，而且在多个疑难系列单片机解密中取得重大突破，可以长期面向各类客户提供最具可靠性和经济价值的解密方案。
SST39LF200A FEATURES:
• Organized as 128K x16 / 256K x16 / 512K x16
• Single Voltage Read and Write Operations
– 3.0-3.6V for SST39LF200A/400A/800A
– 2.7-3.6V for SST39VF200A/400A/800A
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Low Power Consumption
(typical values at 14 MHz)
– Active Current: 9 mA (typical)
– Standby Current: 3 µA (typical)
• Sector-Erase Capability
– Uniform 2 KWord sectors
• Block-Erase Capability
– Uniform 32 KWord blocks
• Fast Read Access Time
– 55 ns for SST39LF200A/400A/800A
– 70 ns for SST39VF200A/400A/800A
• Latched Address and Data
• Fast Erase and Word-Program
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 70 ms (typical)
– Word-Program Time: 14 µs (typical)
– Chip Rewrite Time:
2 seconds (typical) for SST39LF/VF200A
4 seconds (typical) for SST39LF/VF400A
8 seconds (typical) for SST39LF/VF800A
• Automatic Write Timing
– Internal VPP Generation
• End-of-Write Detection
– Toggle Bit
– Data# Polling
• CMOS I/O Compatibility
• JEDEC Standard
– Flash EEPROM Pinouts and command sets
• Packages Available
– 48-lead TSOP (12mm x 20mm)
– 48-ball TFBGA (6mm x 8mm)
– 48-ball WFBGA (4mm x 6mm)
– 48-bump XFLGA (4mm x 6mm) – 4 and 8Mbit
• All non-Pb (lead-free) devices are RoHS compliant