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SN8P2501A芯片解密

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    SN8P2501A FEATURES
  Memory configuration
  OTP ROM size: 1K * 16 bits.
  RAM size: 48 * 8 bits.
  Four levels stack buffer.
  I/O pin configuration
  Input only: P1.1.
  Bi-directional: P0, P1, P2, P5.
  Wakeup: P0, P1.
  Pull-up resisters: P0, P1, P2, P5.
  External interrupt: P0.
  One pin with open-drain: P1.0.
  3 interrupt sources
  Two internal interrupts: T0, TC0.
  One external interrupts: INT0.
  Powerful instructions
  One clock per machine cycle
  Most of instructions are one cycle only.
  All ROM area JMP instruction.
  All ROM area lookup table function (MOVC)
  One channel PWM output. (PWM0)
  One channel Buzzer output. (BZ0)
  Two 8-bit timer counters. (T0, TC0).
  One RTC timer. (T0)
  On chip watchdog timer.
  ? Three system clocks
  External high clock: RC type up to 10 MHz
  External high clock: Crystal type up to 16 MHz
  Internal low clock: RC type 16KHz(3V), 32KHz(5V)
  Internal high clock: 16MHz RC type.
  Four operating modes
  Normal mode: Both high and low clock active
  Slow mode: Low clock only
  Sleep mode: Both high and low clock stop
  Green mode: Periodical wakeup by T0 Timer
  Package (Chip form support)
  PDIP 14 pins
  SOP 14 pins
  SSOP 16 pins