深圳芯片解密研究所主攻单片机解密（MCU解密）、专用IC解密、芯片解密、PLD芯片解密、CPLD芯片解密、FPGA解密、DSP芯片解密、ARM芯片解密，软件解密，单片机软硬件开发等技术研究，长期专注加密芯片功能的设计和软件算法的研究、算法的软件实现，如：des加密、对称加密、md5加密等加解密算法的研究，及其硬件功能的实现、系统软件的开发和芯片底层驱动的设计，在MCU/CPLD/SPLD/PLD芯片解密技术的领域积累了丰富的开发经验。
有AT91FR40162S解密需求者请直接与我们联系：
芯片解密咨询电话：086-0755-33348608，82816682
咨询QQ：582614144
Email：boxsale@126.com
The AT91FR40162S is a member of the Atmel AT91 16/32-bit Microcontroller family, which is based on the ARM7TDMI processor core. The processor has a high-performance 32-bit RISC architecture with a high-density 16-bit instruction set and very low power consumption.
The AT91FR40162S ARM microcontroller features 2 Mbits of on-chip SRAM and 2 Mbytes of Flash memory in a single compact 121-ball BGA package. Its high level of integration and very small footprint make the device ideal for space-constrained applications. The high-speed on-chip SRAM enables a performance of up to 74 MIPs in typical conditions with significant power reduction and EMC improvement over an external SRAM implementation.
The Flash memory may be programmed via the JTAG/ICE interface or the factoryprogrammed Flash Memory Uploader (FMU) using a single device supply, making the AT91FR40162S suitable for in-system programmable applications.
AT91FR40162S Features
Incorporates the ARM7TDMI? ARM? Thumb? Processor Core
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– Embedded ICE (In-circuit Emulation)
256K Bytes of On-chip SRAM
– 32-bit Data Bus, Single-clock Cycle Access
1024K Words 16-bit Flash Memory (2M bytes)
– Single Voltage Read/Write,
– Sector Erase Architecture
– Erase Suspend Capability
– Low-power Operation
– Data Polling, Toggle Bit and Ready/Busy End of Program Cycle Detection
– Reset Input for Device Initialization
– Sector Program Unlock Command
– 128-bit Protection Register
– Factory-programmed AT91 Flash Memory Uploader Software
Fully Programmable External Bus Interface (EBI)
– Up to 8 Chip Selects, Maximum External Address Space of 64M Bytes
– Software Programmable 8/16-bit External Data Bus
8-level Priority, Individually Maskable, Vectored Interrupt Controller
– 4 External Interrupts, Including a High-priority Low-latency Interrupt Request
32 Programmable I/O Lines
3-channel 16-bit Timer/Counter
– 3 External Clock Inputs, 2 Multi-purpose I/O Pins per Channel
2 USARTs
– 2 Dedicated Peripheral Data Controller (PDC) Channels per USART
Programmable Watchdog Timer
Advanced Power-saving Features
– CPU and Peripherals Can be De-activated Individually
Fully Static Operation:
– 0 Hz to 75 MHz Internal Frequency Range at VDDCORE = 1.8V, 85°C
2.7V to 3.6V I/O Operating Range, 1.65V to 1.95V Core Operating Range
-40° C to 85° C Temperature Range
Available in a 121-ball 10 x 10 x 1.2 mm BGA Package with 0.8 mm Ball Pitch
