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AT89C5130A解密

    大部分单片机都带有加密锁定位或者加密字节,以保护片内程序。如果在编程时加密锁定位被使能(锁定),就无法用普通编程器直接读取单片机内的程序,这就叫单片机加密。单片机攻击者借助专用设备或者自制设备,利用单片机芯片设计上的漏洞或软件缺陷,通过多种技术手段,就可以从芯片中提取关键信息,获取单片机内程序这就叫单片机解密。
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  AT89C5130A/31A-M is a high-performance Flash version of the 80C51 single-chip 8-bit microcontrollers with full speed USB functions.AT89C5130A/31A-M features a full-speed USB module compatible with the USB specifications Version 1.1 and 2.0. This module integrates the USB transceivers with a 3.3V voltage regulator and the Serial Interface Engine (SIE) with Digital Phase Locked Loop and 48 MHz clock recovery. USB Event detection logic (Reset and Suspend/Resume)and FIFO buffers supporting the mandatory control Endpoint (EP0) and up to 6 versatile Endpoints (EP1/EP2/EP3/EP4/EP5/EP6) with minimum software overhead are also part of the USB module.
  AT89C5130A/31A-M retains the features of the Atmel 80C52 with extended Flash capacity (16/32-Kbytes), 256 bytes of internal RAM, a 4-level interrupt system, two 16-bit timer/counters (T0/T1), a full duplex enhanced UART (EUART) and an on-chip oscillator. In addition, AT89C5130A/31A-M has an on-chip expanded RAM of 1024 bytes (ERAM),a dual data pointer, a 16-bit up/down Timer (T2), a Programmable Counter Array (PCA),up to 4 programmable LED current sources, a programmable hardware watchdog and a power-on reset.
  AT89C5130A/31A-M has two software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial ports and the interrupt system are still operating. In the power-down mode the RAM is saved, the peripheral clock is frozen, but the device has full wake-up capability through USB events or external interrupts.
  AT89C5130A Features
  80C52X2 Core (6 Clocks per Instruction)
  – Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode
  – Dual Data Pointer
  – Full-duplex Enhanced UART (EUART)
  – Three 16-bit Timer/Counters: T0, T1 and T2
  – 256 Bytes of Scratchpad RAM
  16/32-Kbyte On-chip Flash In-System Programming through USB
  – Byte and Page (128 bytes) Erase and Write
  – 100k Write Cycles
  4-Kbyte EEPROM for Bootloader (3-Kbyte) and Data (1-Kbyte)
  – Byte and Page (128 bytes) Erase and Write
  – 100k Write Cycles
  On-chip Expanded RAM (ERAM): 1024 Bytes
  Integrated Power Monitor (POR/PFD) to Supervise Internal Power Supply
  USB 1.1 and 2.0 Full Speed Compliant Module with Interrupt on Transfer Completion
  – Endpoint 0 for Control Transfers: 32-byte FIFO
  – 6 Programmable Endpoints with In or Out Directions and with Bulk, Interrupt or
  Isochronous Transfers
  Endpoint 1, 2, 3: 32-byte FIFO
  Endpoint 4, 5: 2 x 64-byte FIFO with Double Buffering (Ping-pong Mode)
  Endpoint 6: 2 x 512-byte FIFO with Double Buffering (Ping-pong Mode)
  – Suspend/Resume Interrupts
  – 48 MHz PLL for Full-speed Bus Operation
  – Bus Disconnection on Microcontroller Request
  5 Channels Programmable Counter Array (PCA) with 16-bit Counter, High-speed
  Output, Compare/Capture, PWM and Watchdog Timer Capabilities
  Programmable Hardware Watchdog Timer (One-time Enabled with Reset-out): 100 ms
  to 3s at 8 MHz
  Keyboard Interrupt Interface on Port P1 (8 Bits)
  TWI (Two Wire Interface) 400Kbit/s
  SPI Interface (Master/Slave Mode)
  34 I/O Pins
  4 Direct-drive LED Outputs with Programmable Current Sources: 2-6-10 mA Typical
  4-level Priority Interrupt System (11 sources)
  Idle and Power-down Modes
  0 to 24 MHz On-chip Oscillator with Analog PLL for 48 MHz Synthesis
  Industrial Temperature Range
  Extended Range Power Supply: 2.7V to 5.5V (3.3V to 5.5V required for USB)
  Packages: PLCC52, VQFP64, QFN32

 

[来源:芯片解密研究所] [作者:admin] [日期:09-10-10] [热度:]

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